个人兴趣

我是一个芯片验证工程师，在日常工作中，python是我最重要的scripting language。现在我还用python的[http://wiki.python.org/moin/MyHDL MyHDL] package来搭建testbench, it works well。我的兴趣范围还包括[wiki:ChunLinZhang/SystemC SystemC], [wiki:ChunLinZhang/Specman Specman], [wiki:ChunLinZhang/SystemVerilog SystemVerilog], testbench automation，coverage driven verification等，希望能和IC design领域的同行多多交流。

Verification vs. Test

Verification Predictive analysis to ensure that the synthesized design, when manufactured, will perform the given I/O function
Test A manufacturing step that ensures that the physical device, manufactured from the synthesized design, has no manufacturing defect.
[http://www.eng.auburn.edu/~vagrawal/ website about test]

Equivalence Check / STA

FPGA approach

SynplifyPro -> Conformal (lec) -> ISE Timing Analyzer (trce)BR set verification mode on in Synplify to generate the .vif file, use vif2conformal to translate the vif file the a format that recognizible by conformal. The inputs of trce is .ncd and .pcf files

ASIC approach

Design Compiler -> Formality -> PrimeTime

processing excel with python

read

[http://www.lexicon.net/sjmachin/xlrd.htm xlrd]从python.cn上看到的介绍，自己没有试过。

write

[http://sourceforge.net/projects/pyxlwriter/ xlwriter] I have ever used this package to generate the summary verification report, quite good to do the same kind of work like report auto-generation. It is also platform independent. The bad side is not very easy to control the format. Some sample code:

   1 import pyXLWriter as xl
   2 def report_autogen(filename):
   3     wbk = xl.Writer(filename)
   4     sumsheet = wbk.add_worksheet('Summary')
   5     wbk.close()
   6     return 0

技术类

Include(ChunLinZhang/bookmark)

[wiki:ChunLinZhang/projects 我的项目]

   1 from myhdl import *

精品电子书

Professional Verification -- A Guide to Advanced Funcational Verication, by Paul Wilcox, Cadence Design Systems, Inc.

{zh} [email protected]

MonthCalendar

CategoryHomepage

-  ⇤ ← Revision 36 as of 2005-06-03 13:51:50 → 
  Size: 1859
  Editor: ChunLinZhang
  Comment:
+   ← Revision 42 as of 2005-06-10 13:36:06 → ⇥
  Size: 2368
  Editor: ChunLinZhang
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 6:
-我是一个芯片验证工程师，在日常工作中，python是我最重要的scripting language。现在我还用python的[http://wiki.python.org/moin/MyHDL MyHDL] package来搭建testbench, it works well。我的兴趣范围还包括[wiki:Self:ChunLinZhang/SystemC SystemC]，[wiki:Self:ChunLinZhang/Specman Specman], {{{SystemVerilog}}}，testbench automation，coverage driven verification等，希望能和IC design领域的同行多多交流。
+我是一个芯片验证工程师，在日常工作中，python是我最重要的scripting language。现在我还用python的[http://wiki.python.org/moin/MyHDL MyHDL] package来搭建testbench, it works well。我的兴趣范围还包括[wiki:Self:ChunLinZhang/SystemC SystemC], [wiki:Self:ChunLinZhang/Specman Specman], [wiki:Self:ChunLinZhang/SystemVerilog SystemVerilog], testbench automation，coverage driven verification等，希望能和IC design领域的同行多多交流。
 Line 11:
+== Equivalence Check / STA ==
 * FPGA approach
{{{SynplifyPro -> Conformal (lec) -> ISE Timing Analyzer (trce)}}}[[BR]]
set verification mode on in Synplify to generate the .vif file, use vif2conformal to translate the vif file the a format that recognizible by conformal. The inputs of ''trce'' is .ncd and .pcf files
 * ASIC approach
{{{Design Compiler -> Formality -> PrimeTime}}}
== processing excel with python ==
=== read ===
[http://www.lexicon.net/sjmachin/xlrd.htm xlrd]从python.cn上看到的介绍，自己没有试过。
=== write ===
[http://sourceforge.net/projects/pyxlwriter/ xlwriter] I have ever used this package to generate the summary verification report, quite good to do the same kind of work like report auto-generation. It is also platform independent. The bad side is not very easy to control the format. Some sample code:
{{{#!python
import pyXLWriter as xl
def report_autogen(filename):
    wbk = xl.Writer(filename)
    sumsheet = wbk.add_worksheet('Summary')
    wbk.close()
    return 0
}}}
-Line 12:
+Line 31:
- * [http://www.python.org python官方网站]
 * [http://www.systemc.org OSCI官方网站]
 * [http://www.51eda.com/bbs 51EDA]
 * [http://www.synplicity.com synplicity]
 * [http://www.xilinx.com xilinx]
 * [http://www.xdush.com/bbs 西电上海校友会]
 * [http://info.cmbchina.com 招商银行]
 * [http://www.shmc.com.cn 上海移动]
 * [http://www.okng.com 数字卡]
 * [http://www.shfft.com 付费通]
 * [https://www.95559.sh.cn:446/pubbank/private/privatelogin.jsp 交通银行]
 * [http://bt.btchina.net/?categoryid=-1 BT Hot List]
 * [http://192.168.8.7/vqwiki/jsp/index.jsp wiki in java]
 * [http://192.168.8.7:10010/cqweb/logon/default.asp ClearQuest]
 * [wiki:Self:ChunLinZhang/bookmark 我经常访问的地方]
+[[Include(ChunLinZhang/bookmark)]]
-Line 33:
+Line 38:
+= 精品电子书 =
-Line 34:
+Line 40:
+ * Professional Verification -- A Guide to Advanced Funcational Verication, by Paul Wilcox, Cadence Design Systems, Inc.

Diff for "Nicran"