现在的项目

项目概述

建立一个嵌入式控制器芯片(SoC)的功能验证环境。这个芯片有embedded java processor，采用wishbone总线结构。

验证策略

constraint random

coverage driven

code coverage

functional coverage

assertion based

用PSL作为assertion language，并且利用其中的cover来统计control based functional coverage。

Technologies and Tools

Simulator采用Cadence的IUS54
Debugger采用Novas的Debussy 5.4v7。
Code Coverage analysis采用Cadence的Incisive Coverage Tool, 其实说白了就是hdlscore。

验证环境

drawing:verif

Coverage Metrics

Code coverage analysis is mandatory in this project. Block/Path/Expression coverage are analysised. FSM coverage data is not analysised in this stage.

Functional Coverage is a relatively new concept in this project, so this coverage data collection and analysis is optional for each IP.

Regression

A seperate script written in python is used for regression. This script has the ability to run all of the test cases in a list file, and then generate a report summary file.

项目管理

cvs is adapted for revision control，Rational ClearQuest is adapted as issue/bug tracking tool

-  ⇤ ← Revision 4 as of 2005-05-12 07:10:49 → 
  Size: 942
  Editor: ChunLinZhang
  Comment:
+   ← Revision 6 as of 2005-05-12 07:21:09 → ⇥
  Size: 1408
  Editor: ChunLinZhang
  Comment:
-Deletions are marked like this.
+Additions are marked like this.
 Line 23:
+Code coverage analysis is mandatory in this project. Block/Path/Expression coverage are analysised. FSM coverage data is not analysised in this stage.

Functional Coverage is a relatively new concept in this project, so this coverage data collection and analysis is optional for each IP.
-Line 24:
+Line 27:
+A seperate script written in python is used for regression. This script has the ability to run all of the test cases in a list file, and then generate a report summary file.

Diff for "ChunLinZhang/projects"