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drawing:mytest drawing:verif

我的项目 TableOfContents 看看我都做了些什么

现在的项目

项目概述

建立一个嵌入式控制器芯片(SoC)的功能验证环境。这个芯片有embedded java processor,采用wishbone总线结构。

验证策略

constraint random

coverage driven

code coverage

functional coverage

assertion based

用PSL作为assertion language,并且利用其中的cover来统计control based functional coverage。

Technologies and Tools

  • Simulator采用Cadence的IUS54
  • Debugger采用Novas的Debussy 5.4v7。
  • Code Coverage analysis采用Cadence的Incisive Coverage Tool, 其实说白了就是hdlscore。

验证环境

drawing:verif

Coverage Metrics

Regression

项目管理

== env user guide ==

ChunLinZhang/projects (last edited 2009-12-25 07:14:15 by localhost)